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  unisonic technologies co., ltd mje13005 npn silicon transistor www.unisonic.com.tw 1 of 8 copyright ? 2008 unisonic technologies co., ltd qw-r203-018,f npn silicon power transistors ? description these devices are designed for high-voltage, high-speed power switching inductive circuits where fall time is critical. they are particularly suited for 115 and 220 v switchmode. ? features * v ceo(sus) = 400 v * reverse bias soa with inductive loads @ t c = 100 * inductive switching matrix 2 to 4 amp, 25 and 100 . . . tc @ 3a, 100 is 180 ns (typ) * 700v blocking capability * soa and switching applications information ? applications * switching regulator?s, inverters * motor controls * solenoid/relay drivers * deflection circuits to-220 to-220f 1 1 to-263 1 to-126 1 *pb-free plating product number: mje13005l ? ordering information ordering number pin assignment normal lead free plating package 1 2 3 packing mje13005-t60-k mje13005l-t60-k to-126 b c e bulk MJE13005-TA3-T mje13005l-ta3-t to-220 b c e tube mje13005-tf3-t mje13005l-tf3-t to-220f b c e tube mje13005-tq3-r mje13005l-tq3-r to-263 b c e tape reel mje13005-tq3-t mje13005l-tq3-t to-263 b c e tube
mje13005 npn silicon transistor unisonic technologies co., ltd 2 of 8 www.unisonic.com.tw qw-r203-018,f ? absolute maximum ratings parameter symbol ratings unit collector-emitter voltage v ceo(sus) 400 v collector-emitter voltage v cbo 700 v emitter base voltage v ebo 9 v continuous ic 4 a collector current peak (1) i cm 8 a continuous i b 2 a base current peak (1) i bm 4 a continuous i e 6 a emitter current peak (1) i em 12 a 2 w total power dissipation at ta=25 derate above 25 p d 16 mw/ 75 w total power dissipation at t c =25 derate above 25 p d 600 mw/ operating and storage juncti on temperature range t j , t stg -65 ~ +150 note: absolute maximum ratings are those values beyond which the device could be permanently damaged. absolute maximum ratings are stress ratings only and functional device oper ation is not implied. ? thermal data parameter symbol max unit thermal resistance, junction to ambient ja 62.5 /w thermal resistance, junction to case jc 1.67 /w (1) pulse test : pulse width=5ms,duty cycle 10% ? electrical characteristics (tc=25 , unless otherwise specified) parameter symbol test conditions min typ max unit *off characteristics (1) collector-emitter sustaining voltage v ceo(sus) ic=10ma , i b =0 400 v collector cutoff current i cbo v cbo =rated value, v be(off) =1.5 v v cbo =rated value, v be(off) =1.5v, tc=100 1 5 ma emitter cutoff current i ebo v eb =9v, ic=0 1 ma second breakdown second breakdown collector current with bass forward biased is/b see figure 11 clamped inductive soa with base reverse biased rbsoa see figure 12 *on characteristics (1) h fe1 ic=1a, v ce =5v 10 60 dc current gain h fe2 ic=2a, v ce =5v 8 40 ic=1a, i b =0.2a 0.5 v ic=2a, i b =0.5a 0.6 v ic=4a, i b =1a 1 v collector-emitter satu ration voltage v ce(sat) ic=2a, i b =0.5a, ta=100 1 v ic=1a, i b =0.2a 1.2 v ic=2a, i b =0.5a 1.6 v base-emitter satura tion voltage v be (sat) ic=2a, i b =0.5a, tc=100 1.5 v dynamic characteristics current-gain-bandwidth product f t ic=500ma, v ce =10v, f=1mhz 4 mhz output capacitance cob v cb =10v, i e =0, f=0.1mhz 65 pf
mje13005 npn silicon transistor unisonic technologies co., ltd 3 of 8 www.unisonic.com.tw qw-r203-018,f ? electrical characteristics (cont.) parameter symbol test conditions min typ max unit switching characteristics resistive load (table 1) delay time t d 0.025 0.1 s rise time t r 0.3 0.7 s storage time t s 1.7 4 s fall time t f vcc=125v, ic=2a, i b1 =i b2 =0.4a, t p =25 s, duty cycle 1% 0.4 0.9 s * pulse test: pulse width=300 s, duty cycle 2% table 1.test conditions for dynamic performance reverse bias safe operating area an d inductive switching resistive swithcing test circuits p w 5v duty cycle? 10% t r , t f ? 10ns 68 0.001f 1k 1n4933 0.02f 270 +5v 1k 1k 33 1n4933 1n4933 33 +5v r b mje210 i b 2n2222 2n2905 47 1/2w 100 mje200 -v be (off) t.u.t. v cc mr826* v *sel 5.1k 51 v c l i c note p w and v cc adjusted for desired i c r b adjusted for desired i b1 +125v r b d1 -4.0v scope r c tut circuit values coil data : gap for 200 h/20 a vcc=20v ferroxcube core #6656 lcoil=200 h v clamp =300v full bobbin ( ~ 16 turns) #16 vcc=125v rc=62 ? d1=1n5820 or equiv. r b =22 ? test waveforms output waveforms
mje13005 npn silicon transistor unisonic technologies co., ltd 4 of 8 www.unisonic.com.tw qw-r203-018,f ? resistive switching performance t i m e , t ( ) t i m e , t ( ) t r a n s i e n t t h e r m a l r e s i s t a n c e , r ( t ) ( n o r m a l i z e d ) c o l l e c t o r c u r r e n t , i c ( a ) c o l l e c t o r c u r r e n t , i c ( p k ) ( a )
mje13005 npn silicon transistor unisonic technologies co., ltd 5 of 8 www.unisonic.com.tw qw-r203-018,f ? resistive switching performance
mje13005 npn silicon transistor unisonic technologies co., ltd 6 of 8 www.unisonic.com.tw qw-r203-018,f ? safe operating area information forward bias there are two limitations on the power handling ability of a transistor: aver age junction temperature and second breakdown. safe operating area curves indicate i c -v ce limits of the transistor that must be observed for reliable operation; e., the transistor must not be subjected to greater dissipation than the curves indicate. the data of figure 4 is based on t c = 25 ; t j (pk) is variable depending on power level. second breakdown pulse limits are valid for duty cycles to 10% but must be derated when t c 25 . second breakdown limitations do not derate the same as thermal limitations. allowable current at the voltages shown on figure 4 may be found at any case temperature by using the appropriate curve on figure 6. t j (pk) may be calculated from the data in figure 10. at high case temperatur es, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. reverse bias for inductive loads, high voltage and high current must be sustained simultaneously during tu rn-off, in most cases, with the base to emitter junction reverse biased. under thes e conditions the collector voltage must be held to a safe level at or below a specific value of collector current. this can be accomplished by several means such as active clamping, rc snubbing, load line shaping, etc. the safe level for these devices is specified as reverse bias safe operating area and represents t he voltage-current cond itions during reverse biased turn-off. this rating is verified under clamped conditions so that the device is never subjected to an avalanche mode. figure 5 gives the complete rbsoa characteristics.
mje13005 npn silicon transistor unisonic technologies co., ltd 7 of 8 www.unisonic.com.tw qw-r203-018,f ? typical characteristics
mje13005 npn silicon transistor unisonic technologies co., ltd 8 of 8 www.unisonic.com.tw qw-r203-018,f utc assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all utc products described or contained herein. utc products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice.


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